Frame Buffer

V1.0

fbdemo.c

#include <stdio.h>
#include <fcntl.h>
#include <stdlib.h>
#include <errno.h>
#include <sys/mman.h>
#include <linux/fb.h>
#define FBDEV "/dev/fb0"

static char* default_framebuffer=FBDEV;

struct fb_dev
{
int fb;
void *fb_mem;
int fb_width, fb_height, fb_line_len, fb_size;
int fb_bpp;
};

static struct fb_dev fbdev;

static void draw(int color)
{
int i, j;
unsigned short int *p=(unsigned short int*) fbdev.fb_mem;

for(i=0; i<fbdev.fb_height; i++, p+=fbdev.fb_line_len/2)
{
for(j=0; j<fbdev.fb_width; j++)
p[j]=color;
}
}

int framebuffer_open(void)
{
int fb;
struct fb_var_screeninfo fb_vinfo;
struct fb_fix_screeninfo fb_finfo;
char* fb_dev_name = NULL;

if(!(fb_dev_name = getenv("FRAMEBUFFER")))
{
fb_dev_name = default_framebuffer;
fb = open(fb_dev_name, O_RDWR);
if(fb<0)
{
printf("device %s open failedn", fb_dev_name);
return -1;
}
}

if(ioctl(fb, FBIOGET_VSCREENINFO, &fb_vinfo))
{
printf("Can't get VSCREENINFO: %sn", strerror(errno));
close(fb);
return -1;
}

if(ioctl(fb, FBIOGET_FSCREENINFO, &fb_finfo))
{
printf("Can't get FSCREENINFO: %sn", strerror(errno));
return 1;
}

fbdev.fb_bpp = fb_vinfo.red.length + fb_vinfo.green.length + fb_vinfo.blue.length + fb_vinfo.transp.length;

fbdev.fb_width = fb_vinfo.xres;
fbdev.fb_height = fb_vinfo.yres;
fbdev.fb_line_len = fb_finfo.line_length;
fbdev.fb_size = fb_finfo.smem_len;

printf("frame buffer: %d(%d)x%d, %dbpp, 0x%xbyten",
fbdev.fb_width, fbdev.fb_line_len, fbdev.fb_height,
fbdev.fb_bpp, fbdev.fb_size);

if(fbdev.fb_bpp!=16)
{
printf("frame buffer must be 16bpp moden");
exit(0);
}

fbdev.fb_mem = mmap(NULL, fbdev.fb_size,
PROT_READ | PROT_WRITE, MAP_SHARED, fb, 0);
if(fbdev.fb_mem == NULL || (int) fbdev.fb_mem == -1)
{
fbdev.fb_mem = NULL;
printf("mmap failedn");
close(fb);
return -1;
}

fbdev.fb = fb;
memset(fbdev.fb_mem, 0x0, fbdev.fb_size);

return 0;
}

void framebuffer_close()
{
if(fbdev.fb_mem)
{
munmap(fbdev.fb_mem, fbdev.fb_size);
fbdev.fb_mem = NULL;
}

if(fbdev.fb)
{
close(fbdev.fb);
fbdev.fb = 0;
}
}

int main(void)
{
int i;
framebuffer_open();

for(i=0; i<16; i++)
{
printf("%d:color=0x%x",i,1<<i);
draw(1<<i);
getchar();
}

framebuffer_close();
return 0;
}

Frame Buffer Driver

s3c2410fb_3_5.c

/*
* linux/drivers/video/s3c2410fb.c
*
* CopyRight (C) 2002 SAMSUNG ELECTRONICS
* SW.LEE <hitchcar@sec.samsung.com>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive for
* more details.
*/

#include <linux/config.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
#include <linux/fb.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/init.h>
#include <linux/cpufreq.h>

#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <asm/uaccess.h>

#include <video/fbcon.h>
#include <video/fbcon-mfb.h>
#include <video/fbcon-cfb4.h>
#include <video/fbcon-cfb8.h>
#include <video/fbcon-cfb16.h>

#define LCD_XRES 240
#define LCD_YRES 320
#define LCD_VBPD ((2-1)&0xff)
#define LCD_VFPD ((3-1)&0xff)
#define LCD_VSPW ((2-1)&0x3f)
#define LCD_HBPD ((40-1)&0x7f)
#define LCD_HFPD ((20-1)&0xff)
#define LCD_HSPW ((20-1)&0xff)
#define LCD_CLKVAL_TFT (7)

/*
* enable this if your panel appears to have broken
*/
#undef CHECK_COMPAT

/*
* debugging?
*/
#define DEBUG 0

#define YOU_WANT_TO_DRAW_TETRAGON

#define DELAY(x) mdelay(x)
/*
* Complain if VAR is out of range.
*/
#define DEBUG_VAR 0

#include "s3c2410fb.h"

void (*s3c2410fb_blank_helper)(int blank);
/* EXPORT_SYMBOL(s3c2410fb_blank_helper); */

/*
* IMHO this looks wrong. In 8BPP, length should be 8.
*/
static struct s3c2410fb_rgb rgb_8 = {
red: { offset: 0, length: 4, },
green: { offset: 0, length: 4, },
blue: { offset: 0, length: 4, },
transp: { offset: 0, length: 0, },
};

/* S3C2410
* 256 Palette Usage (TFT)
* 256 color palette consist of 256(depth) * 16 bit SPSRAM
*/

static struct s3c2410fb_rgb def_rgb_16 = {
red: { offset: 11, length: 5, },
green: { offset: 5, length: 6, },
blue: { offset: 0, length: 5, },
transp: { offset: 0, length: 0, },
};

/*******
* role : Fill Machine dependant data ,according to STN or TFT
*
*/
static void __init s3c2410fb_get_machine_info(struct s3c2410fb_info *fbi)
{

static struct s3c2410fb_mach_info inf __initdata = {
pixclock: 174757, bpp: 16,
xres: LCD_XRES, yres: LCD_YRES,
//hsync_len: 0, vsync_len: 0,
//left_margin: 0, upper_margin: 0,
//right_margin: 0, lower_margin: 0,

hsync_len : 5, vsync_len : 1,
left_margin : 7, upper_margin : 1,
right_margin: 3, lower_margin : 3,

sync: 0, cmap_static: 1,
};

fbi->max_xres = inf.xres;
fbi->fb.var.xres = inf.xres;
fbi->fb.var.xres_virtual = inf.xres;
fbi->max_yres = inf.yres;
fbi->fb.var.yres = inf.yres;
fbi->fb.var.yres_virtual = inf.yres;
fbi->max_bpp = inf.bpp;
fbi->fb.var.bits_per_pixel = inf.bpp;
fbi->fb.var.pixclock = inf.pixclock;
fbi->fb.var.hsync_len = inf.hsync_len;
fbi->fb.var.left_margin = inf.left_margin;
fbi->fb.var.right_margin = inf.right_margin;
fbi->fb.var.vsync_len = inf.vsync_len;
fbi->fb.var.upper_margin = inf.upper_margin;
fbi->fb.var.lower_margin = inf.lower_margin;
fbi->fb.var.sync = inf.sync;
fbi->fb.var.grayscale = inf.cmap_greyscale;
fbi->cmap_inverse = inf.cmap_inverse;
fbi->cmap_static = inf.cmap_static;
}

static void s3c2410fb_lcd_port_init(void );
static int s3c2410fb_activate_var(struct fb_var_screeninfo *var, struct s3c2410fb_info *);
static void set_ctrlr_state(struct s3c2410fb_info *fbi, u_int state);

#define FR_WIDTH LCD_XRES
#define FR_HEIGHT LCD_YRES

struct FrameBuffer {
unsigned short pixel[FR_HEIGHT][FR_WIDTH];
};
struct FrameBuffer *FBuf;

#ifdef YOU_WANT_TO_DRAW_TETRAGON
static void lcd_demo(void)
{
// Test LCD Initialization. by displaying R.G.B and White.
int i,j;
for(i=0 ;i<FR_HEIGHT/2;i++)
{
for(j=0;j<FR_WIDTH;j++)
{
if(j<FR_WIDTH/2)
FBuf->pixel[i][j]= 0xffff;
else
FBuf->pixel[i][j]= 0xf800;
}
}
for(i=FR_HEIGHT/2 ;i<FR_HEIGHT;i++)
{
for(j=0;j<FR_WIDTH;j++)
{
if(j<FR_WIDTH/2)
FBuf->pixel[i][j]= 0x07e0;
else
FBuf->pixel[i][j]= 0x001f;
}
}
}
#endif

static void s3c2410fb_lcd_port_init(void)
{

rGPCUP =0xffffffff; // Disable Pull-up register
rGPCCON =0xaaaaaaaa; //Initialize VD[7:0],LCDVF[2:0],VM,VFRAME,VLINE,VCLK,LEND
rGPDUP =0xffffffff; // Disable Pull-up register
rGPDCON =0xaaaaaaaa; //Initialize VD[23:8]

DPRINTK("Initializing GPIO Portsn");

}

static inline void s3c2410fb_schedule_task(struct s3c2410fb_info *fbi, u_int state)
{
unsigned long flags;

local_irq_save(flags);
/*
* We need to handle two requests being made at the same time.
* There are two important cases:
* 1. When we are changing VT (C_REENABLE) while unblanking (C_ENABLE)
* We must perform the unblanking, which will do our REENABLE for us.
* 2. When we are blanking, but immediately unblank before we have
* blanked. We do the "REENABLE" thing here as well, just to be sure.
*/
if (fbi->task_state == C_ENABLE && state == C_REENABLE)
state = (u_int) -1;
if (fbi->task_state == C_DISABLE && state == C_ENABLE)
state = C_REENABLE;

if (state != (u_int)-1) {
fbi->task_state = state;
schedule_task(&fbi->task);
}
local_irq_restore(flags);
}

/*
* Get the VAR structure pointer for the specified console
*/
static inline struct fb_var_screeninfo *get_con_var(struct fb_info *info, int con)
{
struct s3c2410fb_info *fbi = (struct s3c2410fb_info *)info;
return (con == fbi->currcon || con == -1) ? &fbi->fb.var : &fb_display[con].var;
}

/*
* Get the DISPLAY structure pointer for the specified console
*
* struct display fb_display[MAX_NR_CONSOLES]; from fbcon.c
*/

static inline struct display *get_con_display(struct fb_info *info, int con)
{
struct s3c2410fb_info *fbi = (struct s3c2410fb_info *)info;
return (con < 0) ? fbi->fb.disp : &fb_display[con];
}

static inline struct fb_cmap *get_con_cmap(struct fb_info *info, int con)
{
struct s3c2410fb_info *fbi = (struct s3c2410fb_info *)info;
return (con == fbi->currcon || con == -1) ? &fbi->fb.cmap : &fb_display[con].cmap;
}

static inline u_int
chan_to_field(u_int chan, struct fb_bitfield *bf)
{
chan &= 0xffff;
chan >>= 16 - bf->length;
return chan << bf->offset;
}

/*
* Convert bits-per-pixel to a hardware palette PBS value.
*/
static inline u_int
palette_pbs(struct fb_var_screeninfo *var)
{
int ret = 0;
switch (var->bits_per_pixel) {
#ifdef FBCON_HAS_CFB4
case 4: ret = 0 << 12; break;
#endif
#ifdef FBCON_HAS_CFB8
case 8: ret = 1 << 12; break;
#endif
#ifdef FBCON_HAS_CFB16
case 16: ret = 2 << 12; break;
#endif
}
return ret;
}

/******
* bit mask RGB=565 -> RRRR RGGG GGGB BBBB
* 1111 1000 0000 0000 0xf800
* 0000 0111 1110 0000 0x07e0
* 0000 0000 0001 1111 0x001f
*******************************************************/
static int
s3c2410fb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue,
u_int trans, struct fb_info *info)
{
struct s3c2410fb_info *fbi = (struct s3c2410fb_info *)info;
u_int val, ret = 1;

if (regno < fbi->palette_size) {
val = ((red >> 5) & 0xf800);
val |= ((green >> 11) & 0x07e0);
val |= ((blue >> 16) & 0x001f);

if (regno == 0)
val |= palette_pbs(&fbi->fb.var);

fbi->palette_cpu[regno] = val;

ret = 0;
}
return ret;
}

static int
s3c2410fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
u_int trans, struct fb_info *info)
{
struct s3c2410fb_info *fbi = (struct s3c2410fb_info *)info;
struct display *disp = get_con_display(info, fbi->currcon);
u_int val;
int ret = 1;

/*
* If inverse mode was selected, invert all the colours
* rather than the register number. The register number
* is what you poke into the framebuffer to produce the
* colour you requested.
*/

if (disp->inverse) {
red = 0xffff - red;
green = 0xffff - green;
blue = 0xffff - blue;
}

/*
* If greyscale is true, then we convert the RGB value
* to greyscale no mater what visual we are using.
*/
if (fbi->fb.var.grayscale)
red = green = blue = (19595 * red + 38470 * green +
7471 * blue) >> 16;

switch (fbi->fb.disp->visual) {
case FB_VISUAL_TRUECOLOR:
/*
* 12 or 16-bit True Colour. We encode the RGB value
* according to the RGB bitfield information.
*/
if (regno < 16) {
u16 *pal = fbi->fb.pseudo_palette;

val = chan_to_field(red, &fbi->fb.var.red);
val |= chan_to_field(green, &fbi->fb.var.green);
val |= chan_to_field(blue, &fbi->fb.var.blue);

pal[regno] = val;
ret = 0;
}
break;

case FB_VISUAL_STATIC_PSEUDOCOLOR:
case FB_VISUAL_PSEUDOCOLOR:
ret = s3c2410fb_setpalettereg(regno, red, green, blue, trans, info);
break;
}
return ret;
}

/*
* s3c2410fb_decode_var():
* Get the video params out of 'var'. If a value doesn't fit, round it up,
* if it's too big, return -EINVAL.
*
* Suggestion: Round up in the following order: bits_per_pixel, xres,
* yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale,
* bitfields, horizontal timing, vertical timing.
*/
static int
s3c2410fb_validate_var(struct fb_var_screeninfo *var,
struct s3c2410fb_info *fbi)
{
int ret = -EINVAL;

if (var->xres < MIN_XRES)
var->xres = MIN_XRES;
if (var->yres < MIN_YRES)
var->yres = MIN_YRES;
if (var->xres > fbi->max_xres)
var->xres = fbi->max_xres;
if (var->yres > fbi->max_yres)
var->yres = fbi->max_yres;
var->xres_virtual =
var->xres_virtual < var->xres ? var->xres : var->xres_virtual;
var->yres_virtual =
var->yres_virtual < var->yres ? var->yres : var->yres_virtual;

switch (var->bits_per_pixel) {
#ifdef FBCON_HAS_CFB4
case 4: ret = 0; break;
#endif
#ifdef FBCON_HAS_CFB8
case 8: ret = 0; break;
#endif
#ifdef FBCON_HAS_CFB16
case 16: ret = 0; break;
#endif
default:
break;
}

return ret;
}

static inline void s3c2410fb_set_truecolor(u_int is_true_color)
{
DPRINTK("The TFT Panel true_color = %dn", is_true_color);
DELAY(10);

}

static void
s3c2410fb_hw_set_var(struct fb_var_screeninfo *var, struct s3c2410fb_info *fbi)
{
u_long palette_mem_size;

fbi->palette_size = 256;
palette_mem_size = fbi->palette_size * sizeof(u16);
fbi->palette_cpu = (u16 *)(fbi->map_cpu + PAGE_SIZE - palette_mem_size);
fbi->palette_dma = fbi->map_dma + PAGE_SIZE - palette_mem_size;
fb_set_cmap(&fbi->fb.cmap, 1, s3c2410fb_setcolreg, &fbi->fb);

/* Set board control register to handle new color depth */
s3c2410fb_set_truecolor(var->bits_per_pixel >= 16);
s3c2410fb_activate_var(var, fbi);
fbi->palette_cpu[0] = (fbi->palette_cpu[0] &
0xcfff) | palette_pbs(var);
}

/*
* s3c2410fb_set_var():
* Set the user defined part of the display for the specified console
*/
static int
s3c2410fb_set_var(struct fb_var_screeninfo *var, int con, struct fb_info *info)
{
struct s3c2410fb_info *fbi = (struct s3c2410fb_info *)info;
struct fb_var_screeninfo *dvar = get_con_var(&fbi->fb, con);
struct display *display = get_con_display(&fbi->fb, con);
int err, chgvar = 0, rgbidx;

/*
* Decode var contents into a par structure, adjusting any
* out of range values.
*/
err = s3c2410fb_validate_var(var, fbi);
if (err) return err;
if (var->activate & FB_ACTIVATE_TEST)
{
return 0;
}

if ((var->activate & FB_ACTIVATE_MASK) != FB_ACTIVATE_NOW)
{
return -EINVAL;
}

if (dvar->xres != var->xres)
chgvar = 1;
if (dvar->yres != var->yres)
chgvar = 1;
if (dvar->xres_virtual != var->xres_virtual)
chgvar = 1;
if (dvar->yres_virtual != var->yres_virtual)
chgvar = 1;
if (dvar->bits_per_pixel != var->bits_per_pixel)
chgvar = 1;
if (con < 0)
chgvar = 0;

switch (var->bits_per_pixel) {
case 16:
display->visual = FB_VISUAL_TRUECOLOR;
display->line_length = var->xres * 2;
display->dispsw = &fbcon_cfb16;
display->dispsw_data = fbi->fb.pseudo_palette;
rgbidx = RGB_16;
break;
default:
rgbidx = 0;
display->dispsw = &fbcon_dummy;
break;
}

display->screen_base = fbi->screen_cpu;
display->next_line = display->line_length;
display->type = fbi->fb.fix.type;
display->type_aux = fbi->fb.fix.type_aux;
display->ypanstep = fbi->fb.fix.ypanstep;
display->ywrapstep = fbi->fb.fix.ywrapstep;
display->can_soft_blank = 1;
display->inverse = fbi->cmap_inverse;

*dvar = *var;
dvar->activate &= ~FB_ACTIVATE_ALL;

/*
* Copy the RGB parameters for this display
* from the machine specific parameters.
*/
dvar->red = fbi->rgb[rgbidx]->red;
dvar->green = fbi->rgb[rgbidx]->green;
dvar->blue = fbi->rgb[rgbidx]->blue;
dvar->transp = fbi->rgb[rgbidx]->transp;

/*
* Update the old var. The fbcon drivers still use this.
* Once they are using fbi->fb.var, this can be dropped.
*/
display->var = *dvar;

/*
* If we are setting all the virtual consoles, also set the
* defaults used to create new consoles.
*/
if (var->activate & FB_ACTIVATE_ALL)
fbi->fb.disp->var = *dvar;

/*
* If the console has changed and the console has defined
* a changevar function, call that function.
*/
if (chgvar && info && fbi->fb.changevar)
fbi->fb.changevar(con);

/* If the current console is selected, activate the new var. */
if (con != fbi->currcon)
return 0;
s3c2410fb_hw_set_var(dvar, fbi);

return 0;
}

static int
__do_set_cmap(struct fb_cmap *cmap, int kspc, int con,
struct fb_info *info)
{
struct s3c2410fb_info *fbi = (struct s3c2410fb_info *)info;
struct fb_cmap *dcmap = get_con_cmap(info, con);
int err = 0;

if (con == -1)
con = fbi->currcon;

/* no colormap allocated? (we always have "this" colour map allocated) */
if (con >= 0)
err = fb_alloc_cmap(&fb_display[con].cmap, fbi->palette_size, 0);

if (!err && con == fbi->currcon)
err = fb_set_cmap(cmap, kspc, s3c2410fb_setcolreg, info);

if (!err)
fb_copy_cmap(cmap, dcmap, kspc ? 0 : 1);

return err;
}

static int
s3c2410fb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
struct fb_info *info)
{
struct display *disp = get_con_display(info, con);

if (disp->visual == FB_VISUAL_TRUECOLOR ||
disp->visual == FB_VISUAL_STATIC_PSEUDOCOLOR)
return -EINVAL;

return __do_set_cmap(cmap, kspc, con, info);
}

static int
s3c2410fb_get_fix(struct fb_fix_screeninfo *fix, int con, struct fb_info *info)
{
struct display *display = get_con_display(info, con);

*fix = info->fix;

fix->line_length = display->line_length;
fix->visual = display->visual;
return 0;
}

static int
s3c2410fb_get_var(struct fb_var_screeninfo *var, int con, struct fb_info *info)
{
*var = *get_con_var(info, con);
return 0;
}

static int
s3c2410fb_get_cmap(struct fb_cmap *cmap, int kspc, int con, struct fb_info *info)
{
struct fb_cmap *dcmap = get_con_cmap(info, con);
fb_copy_cmap(dcmap, cmap, kspc ? 0 : 2);
return 0;
}

static struct fb_ops s3c2410fb_ops = {
owner: THIS_MODULE,
fb_get_fix: s3c2410fb_get_fix,
fb_get_var: s3c2410fb_get_var,
fb_set_var: s3c2410fb_set_var,
fb_get_cmap: s3c2410fb_get_cmap,
fb_set_cmap: s3c2410fb_set_cmap,
};

/*
* s3c2410fb_switch():
* Change to the specified console. Palette and video mode
* are changed to the console's stored parameters.
*
* Uh oh, this can be called from a tasklet (IRQ)
*/
static int s3c2410fb_switch(int con, struct fb_info *info)
{
struct s3c2410fb_info *fbi = (struct s3c2410fb_info *)info;
struct display *disp;
struct fb_cmap *cmap;

if (con == fbi->currcon)
return 0;

if (fbi->currcon >= 0) {
disp = fb_display + fbi->currcon;

/*
* Save the old colormap and video mode.
*/
disp->var = fbi->fb.var;

if (disp->cmap.len)
fb_copy_cmap(&fbi->fb.cmap, &disp->cmap, 0);
}

fbi->currcon = con;
disp = fb_display + con;

/*
* Make sure that our colourmap contains 256 entries.
*/
fb_alloc_cmap(&fbi->fb.cmap, 256, 0);

if (disp->cmap.len)
cmap = &disp->cmap;
else
cmap = fb_default_cmap(1 << disp->var.bits_per_pixel);

fb_copy_cmap(cmap, &fbi->fb.cmap, 0);

fbi->fb.var = disp->var;
fbi->fb.var.activate = FB_ACTIVATE_NOW;

s3c2410fb_set_var(&fbi->fb.var, con, info);
return 0;
}

/*
* Formal definition of the VESA spec:
* On
* This refers to the state of the display when it is in full operation
* Stand-By
* This defines an optional operating state of minimal power reduction with
* the shortest recovery time
* Suspend
* This refers to a level of power management in which substantial power
* reduction is achieved by the display. The display can have a longer
* recovery time from this state than from the Stand-by state
* Off
* This indicates that the display is consuming the lowest level of power
* and is non-operational. Recovery from this state may optionally require
* the user to manually power on the monitor
*
* Now, the fbdev driver adds an additional state, (blank), where they
* turn off the video (maybe by colormap tricks), but don't mess with the
* video itself: think of it semantically between on and Stand-By.
*
* So here's what we should do in our fbdev blank routine:
*
* VESA_NO_BLANKING (mode 0) Video on, front/back light on
* VESA_VSYNC_SUSPEND (mode 1) Video on, front/back light off
* VESA_HSYNC_SUSPEND (mode 2) Video on, front/back light off
* VESA_POWERDOWN (mode 3) Video off, front/back light off
*
* This will match the matrox implementation.
*/

/*
* s3c2410fb_blank():
* Blank the display by setting all palette values to zero. Note, the
* 12 and 16 bpp modes don't really use the palette, so this will not
* blank the display in all modes.
* blank = 0 unblank ;
* blank > 0 , VESA level
*/
static void s3c2410fb_blank(int blank, struct fb_info *info)
{

#ifdef S3C2410_REAL_BLANK
struct s3c2410fb_info *fbi = (struct s3c2410fb_info *)info;
int i,j;
struct FrameBuffer * pBlankFB;
#endif

#ifdef S3C2410_SUPPORT_PALETTE
switch (blank) {
case VESA_POWERDOWN:
case VESA_VSYNC_SUSPEND:
case VESA_HSYNC_SUSPEND:
case VESA_NO_BLANKING:
if (s3c2410fb_blank_helper)
s3c2410fb_blank_helper(blank);
if (fbi->fb.disp->visual == FB_VISUAL_PSEUDOCOLOR ||
fbi->fb.disp->visual == FB_VISUAL_STATIC_PSEUDOCOLOR)
fb_set_cmap(&fbi->fb.cmap, 1, s3c2410fb_setcolreg, info);
s3c2410fb_schedule_task(fbi, C_ENABLE);
}
#endif

#ifdef S3C2410_REAL_BLANK
pBlankFB = (struct FrameBuffer *) (fbi->screen_cpu);

for(i=0 ;i<FR_HEIGHT;i++)
for(j=0;j<FR_WIDTH;j++)
pBlankFB->pixel[i][j]= 0xffff;
#endif
}

static int s3c2410fb_updatevar(int con, struct fb_info *info)
{
DPRINTK("enteredn");
DELAY(10);

return 0;
}

/*
* s3c2410fb_activate_var():
* Configures LCD Controller based on entries in var parameter. Settings are
* only written to the controller if changes were made.
*/
static int s3c2410fb_activate_var(struct fb_var_screeninfo *var, struct s3c2410fb_info *fbi)
{
struct s3c2410fb_lcd_reg new_regs;
u_long flags;

#if DEBUG_VAR
if (var->xres < 16 || var->xres > 1024)
printk(KERN_ERR "%s: invalid xres %dn",
fbi->fb.fix.id, var->xres);
if (var->hsync_len < 1 || var->hsync_len > 64)
printk(KERN_ERR "%s: invalid hsync_len %dn",
fbi->fb.fix.id, var->hsync_len);
if (var->left_margin < 1 || var->left_margin > 255)
printk(KERN_ERR "%s: invalid left_margin %dn",
fbi->fb.fix.id, var->left_margin);
if (var->right_margin < 1 || var->right_margin > 255)
printk(KERN_ERR "%s: invalid right_margin %dn",
fbi->fb.fix.id, var->right_margin);
if (var->yres < 1 || var->yres > 1024)
printk(KERN_ERR "%s: invalid yres %dn",
fbi->fb.fix.id, var->yres);
if (var->vsync_len < 1 || var->vsync_len > 64)
printk(KERN_ERR "%s: invalid vsync_len %dn",
fbi->fb.fix.id, var->vsync_len);
if (var->upper_margin < 0 || var->upper_margin > 255)
printk(KERN_ERR "%s: invalid upper_margin %dn",
fbi->fb.fix.id, var->upper_margin);
if (var->lower_margin < 0 || var->lower_margin > 255)
printk(KERN_ERR "%s: invalid lower_margin %dn",
fbi->fb.fix.id, var->lower_margin);
#endif

new_regs.lcdsaddr1=
(((unsigned long)fbi->screen_dma>>22)<<21)|M5D((unsigned long)fbi->screen_dma>>1);

new_regs.lcdsaddr2=
M5D(((unsigned long)fbi->screen_dma+(var->xres*var->yres*2))>>1);
new_regs.lcdsaddr3=(((var->xres - var->xres)/1)<<11)|(var->xres/1);

/* Update shadow copy atomically */
local_irq_save(flags);
fbi->reg_lcdcon1 = new_regs.lcdcon1;
fbi->reg_lcdcon2 = new_regs.lcdcon2;
fbi->reg_lcdcon3 = new_regs.lcdcon3;
fbi->reg_lcdcon4 = new_regs.lcdcon4;
fbi->reg_lcdcon5 = new_regs.lcdcon5;
fbi->reg_lcdsaddr1 = new_regs.lcdsaddr1;
fbi->reg_lcdsaddr2 = new_regs.lcdsaddr2;
fbi->reg_lcdsaddr3 = new_regs.lcdsaddr3;
fbi->reg_lpcsel = new_regs.lpcsel;
local_irq_restore(flags);

/*
* Only update the registers if the controller is enabled
* and something has changed.
*/
if(
(rLCDCON1 != fbi->reg_lcdcon1) || (rLCDCON2 != fbi->reg_lcdcon2) ||
(rLCDCON3 != fbi->reg_lcdcon3) || (rLCDCON4 != fbi->reg_lcdcon4) ||
(rLCDCON5 != fbi->reg_lcdcon5) || (rLCDSADDR1 != fbi->reg_lcdsaddr1)||
(rLCDSADDR2 != fbi->reg_lcdsaddr2) || (rLCDSADDR3 != fbi->reg_lcdsaddr3)
)
{
s3c2410fb_schedule_task(fbi, C_REENABLE);
}

return 0;
}

static void s3c2410fb_enable_controller(struct s3c2410fb_info *fbi)
{

/*
* Make sure the mode bits are present in the first palette entry
*/
fbi->palette_cpu[0] &= 0xcfff;
fbi->palette_cpu[0] |= palette_pbs(&fbi->fb.var);

rLCDCON1 =fbi->reg_lcdcon1;
rLCDCON2 =fbi->reg_lcdcon2;
rLCDCON3 =fbi->reg_lcdcon3;
rLCDCON4 =fbi->reg_lcdcon4;
rLCDCON5 =fbi->reg_lcdcon5;
rLCDSADDR1=fbi->reg_lcdsaddr1;
rLCDSADDR2=fbi->reg_lcdsaddr2;
rLCDSADDR3=fbi->reg_lcdsaddr3;

rLCDINTMSK |= 3;
rTPAL=0; // temporary palette register, Disabled

rLPCSEL &= (~7);
rLCDCON1|=1; // ENVID=ON

FBuf = (struct FrameBuffer *)fbi->screen_cpu;
#ifdef YOU_WANT_TO_DRAW_TETRAGON
lcd_demo();

#endif

}

static void s3c2410fb_disable_controller(struct s3c2410fb_info *fbi)
{
DECLARE_WAITQUEUE(wait, current);

add_wait_queue(&fbi->ctrlr_wait, &wait);
set_current_state(TASK_UNINTERRUPTIBLE);

rLCDCON1=fbi->reg_lcdcon1;
rLCDCON2=fbi->reg_lcdcon2;
rLCDCON3=fbi->reg_lcdcon3;
rLCDCON4=fbi->reg_lcdcon4;
rLCDCON5=fbi->reg_lcdcon5;
rLCDSADDR1=fbi->reg_lcdsaddr1;
rLCDSADDR2=fbi->reg_lcdsaddr2;
rLCDSADDR3=fbi->reg_lcdsaddr3;
rLPCSEL = fbi->reg_lpcsel;

rLCDCON1 = rLCDCON1 & 0x3fffe; /* ENVID Clear */

schedule_timeout(20 * HZ / 1000);
current->state = TASK_RUNNING;
remove_wait_queue(&fbi->ctrlr_wait, &wait);
}

/*
* This function must be called from task context only, since it will
* sleep when disabling the LCD controller, or if we get two contending
* processes trying to alter state.
*/
static void set_ctrlr_state(struct s3c2410fb_info *fbi, u_int state)
{
u_int old_state;

down(&fbi->ctrlr_sem);

old_state = fbi->state;

switch (state) {
case C_DISABLE_CLKCHANGE:
/*
* Disable controller for clock change. If the
* controller is already disabled, then do nothing.
*/
if (old_state != C_DISABLE) {
fbi->state = state;
s3c2410fb_disable_controller(fbi);
}
break;

case C_DISABLE:
/*
* Disable controller
*/
if (old_state != C_DISABLE) {
fbi->state = state;

if (old_state != C_DISABLE_CLKCHANGE)
s3c2410fb_disable_controller(fbi);
}
break;

case C_ENABLE_CLKCHANGE:
/*
* Enable the controller after clock change. Only
* do this if we were disabled for the clock change.
*/
if (old_state == C_DISABLE_CLKCHANGE) {
fbi->state = C_ENABLE;
s3c2410fb_enable_controller(fbi);
}
break;

case C_REENABLE:
/*
* Re-enable the controller only if it was already
* enabled. This is so we reprogram the control
* registers.
*/
if (old_state == C_ENABLE) {
s3c2410fb_disable_controller(fbi);
s3c2410fb_enable_controller(fbi);
}
break;

case C_ENABLE:
/*
* Power up the LCD screen, enable controller, and
* turn on the backlight.
*/
if (old_state != C_ENABLE) {
fbi->state = C_ENABLE;
s3c2410fb_enable_controller(fbi);
}
break;
}
up(&fbi->ctrlr_sem);
}

/*
* Our LCD controller task (which is called when we blank or unblank)
* via keventd.
*/
static void s3c2410fb_task(void *dummy)
{
struct s3c2410fb_info *fbi = dummy;
u_int state = xchg(&fbi->task_state, -1);
set_ctrlr_state(fbi, state);
}

/*
* s3c2410fb_map_video_memory():
* Allocates the DRAM memory for the frame buffer. This buffer is
* remapped into a non-cached, non-buffered, memory region to
* allow palette and pixel writes to occur without flushing the
* cache. Once this area is remapped, all virtual memory
* access to the video memory should occur at the new region.
*/
static int __init s3c2410fb_map_video_memory(struct s3c2410fb_info *fbi)
{
/*
* We reserve one page for the palette, plus the size
* of the framebuffer.
*
* fbi->map_dma is bus address (physical)
* fbi->screen_dma = fbi->map_dma + PAGE_SIZE
* fbi->map_cpu is virtual address
* fbi->screen_cpu = fbi->map_cpu + PAGE_SIZE
*
* S3C2400 Result
* map_size is 0x00027000
* map_cpu is 0xC2800000
* smem_start is 0x0CFC1000
* palette_mem_size 0x20
*/

fbi->map_size = PAGE_ALIGN(fbi->fb.fix.smem_len + PAGE_SIZE );
fbi->map_cpu = consistent_alloc(GFP_KERNEL , fbi->map_size,
&fbi->map_dma);
if (fbi->map_cpu) {
fbi->screen_cpu = fbi->map_cpu + PAGE_SIZE ;
fbi->screen_dma = fbi->map_dma + PAGE_SIZE ;
fbi->fb.fix.smem_start = fbi->screen_dma;
}

return fbi->map_cpu ? 0 : -ENOMEM;
}

/* Fake monspecs to fill in fbinfo structure */
static struct fb_monspecs monspecs __initdata = {
30000, 70000, 50, 65, 0 /* Generic */
};

static struct s3c2410fb_info * __init s3c2410fb_init_fbinfo(void)
{
struct s3c2410fb_info *fbi;

fbi = kmalloc(sizeof(struct s3c2410fb_info) + sizeof(struct display) +
sizeof(u16) * 16, GFP_KERNEL);
if (!fbi)
return NULL;

memset(fbi, 0, sizeof(struct s3c2410fb_info) + sizeof(struct display));

fbi->currcon = -1;

strcpy(fbi->fb.fix.id, S3C2410_NAME);
fbi->fb.node = -1; /* What is this ? */
fbi->fb.fix.type = FB_TYPE_PACKED_PIXELS;
fbi->fb.fix.type_aux = 0;
fbi->fb.fix.xpanstep = 0;
fbi->fb.fix.ypanstep = 0;
fbi->fb.fix.ywrapstep = 0;
fbi->fb.fix.accel = FB_ACCEL_NONE; /* No hardware Accelerator */

fbi->fb.var.nonstd = 0;
fbi->fb.var.activate = FB_ACTIVATE_NOW;
fbi->fb.var.height = -1;
fbi->fb.var.width = -1;
fbi->fb.var.accel_flags = 0;
fbi->fb.var.vmode = FB_VMODE_NONINTERLACED;

strcpy(fbi->fb.modename, S3C2410_NAME);
strcpy(fbi->fb.fontname, "Acorn8x8");

fbi->fb.fbops = &s3c2410fb_ops;
fbi->fb.changevar = NULL;
fbi->fb.switch_con = s3c2410fb_switch;
fbi->fb.updatevar = s3c2410fb_updatevar;
fbi->fb.blank = s3c2410fb_blank;
fbi->fb.flags = FBINFO_FLAG_DEFAULT;
fbi->fb.node = -1;
fbi->fb.monspecs = monspecs;
fbi->fb.disp = (struct display *)(fbi + 1); /* golbal display */
fbi->fb.pseudo_palette = (void *)(fbi->fb.disp + 1);

fbi->rgb[RGB_8] = &rgb_8;
fbi->rgb[RGB_16] = &def_rgb_16;

s3c2410fb_get_machine_info(fbi);

fbi->state = C_DISABLE;
fbi->task_state = (u_char)-1;
fbi->fb.fix.smem_len = (fbi->max_xres * fbi->max_yres * fbi->max_bpp) / 8;

init_waitqueue_head(&fbi->ctrlr_wait);
INIT_TQUEUE(&fbi->task, s3c2410fb_task, fbi);
init_MUTEX(&fbi->ctrlr_sem);

return fbi;
}

int __init s3c2410fb_init(void)
{
struct s3c2410fb_info *fbi;
int ret;

printk("S3C2410 TFT LCD FrameBuffer driver for MTLCD-0353224n");
s3c2410fb_lcd_port_init();
fbi = s3c2410fb_init_fbinfo();
ret = -ENOMEM;
if (!fbi)
goto failed;

/* Initialize video memory */
ret = s3c2410fb_map_video_memory(fbi);
if (ret)
goto failed;

s3c2410fb_set_var(&fbi->fb.var, -1, &fbi->fb);
ret = register_framebuffer(&fbi->fb);
if (ret < 0)
goto failed;
/*
* Ok, now enable the LCD controller
*/
set_ctrlr_state(fbi, C_ENABLE);
/* This driver cannot be unloaded at the moment */
MOD_INC_USE_COUNT;
return 0;

failed:
if (fbi) kfree(fbi);
return ret;
}

int __init s3c2410fb_setup(char *options)
{
return 0;
}

module_init(s3c2410fb_init);
MODULE_DESCRIPTION("S3C2410/SAMSUNG framebuffer driver");
MODULE_LICENSE("GPL");

s3c2419fb.h

/*
* linux/drivers/video/s3c2410fb.h
* -- StrongARM 1100 LCD Controller Frame Buffer Device
*
* Copyright (C) 1999 Eric A. Thomas
* Based on acornfb.c Copyright (C) Russell King.
* 2001 Sangwook Lee (hitchcar@sec.samsung.com) S3C2400
* 2002 Sangwook Lee (hitchcar@sec.samsung.com) S3C2410
*
*/

struct s3c2410fb_rgb {
struct fb_bitfield red;
struct fb_bitfield green;
struct fb_bitfield blue;
struct fb_bitfield transp;
};

/*
* This structure describes the machine which we are running on.
*/
struct s3c2410fb_mach_info {
u_long pixclock;

u_short xres;
u_short yres;

u_char bpp;
u_char hsync_len;
u_char left_margin;
u_char right_margin;

u_char vsync_len;
u_char upper_margin;
u_char lower_margin;
u_char sync;

u_int cmap_greyscale:1,
cmap_inverse:1,
cmap_static:1,
unused:29;
};

/* Shadows for LCD controller registers */
struct s3c2410fb_lcd_reg {
unsigned long lcdcon1;
unsigned long lcdcon2;
unsigned long lcdcon3;
unsigned long lcdcon4;
unsigned long lcdcon5;
unsigned long lcdsaddr1;
unsigned long lcdsaddr2;
unsigned long lcdsaddr3;
unsigned long lpcsel;
unsigned long lcdintmsk;
unsigned long tpal;
};

#define RGB_8 (0)
#define RGB_16 (1)
#define NR_RGB 2

struct s3c2410fb_info {
struct fb_info fb;
signed int currcon;

struct s3c2410fb_rgb *rgb[NR_RGB];

u_int max_bpp;
u_int max_xres;
u_int max_yres;

/*
* These are the addresses we mapped
* the framebuffer memory region to.
*/
dma_addr_t map_dma;
u_char * map_cpu;
u_int map_size;

u_char * screen_cpu;
dma_addr_t screen_dma;
u16 * palette_cpu;
dma_addr_t palette_dma;
u_int palette_size;

u_int cmap_inverse:1,
cmap_static:1,
unused:30;

u_int reg_lcdcon1;
u_int reg_lcdcon2;
u_int reg_lcdcon3;
u_int reg_lcdcon4;
u_int reg_lcdcon5;
u_int reg_lcdsaddr1;
u_int reg_lcdsaddr2;
u_int reg_lcdsaddr3;
u_int reg_lpcsel;
u_int reg_lcdintmsk;

volatile u_char state;
volatile u_char task_state;
struct semaphore ctrlr_sem;
wait_queue_head_t ctrlr_wait;
struct tq_struct task;

#ifdef CONFIG_PM
struct pm_dev *pm;
#endif
#ifdef CONFIG_CPU_FREQ
struct notifier_block clockchg;
#endif
};

#define __type_entry(ptr,type,member) ((type *)((char *)(ptr)-offsetof(type,member)))

#define TO_INF(ptr,member) __type_entry(ptr,struct s3c2410fb_info,member)

#define S3C2410_PALETTE_MODE_VAL(bpp) (((bpp) & 0x018) << 9)

/*
* These are the actions for set_ctrlr_state
*/
#define C_DISABLE (0)
#define C_ENABLE (1)
#define C_DISABLE_CLKCHANGE (2)
#define C_ENABLE_CLKCHANGE (3)
#define C_REENABLE (4)

#define S3C2410_NAME "S3C2410"

/*
* Debug macros
*/
#if DEBUG
# define DPRINTK(fmt, args...) printk("%s: " fmt, __FUNCTION__ , ## args)
#else
# define DPRINTK(fmt, args...)
#endif

/*
* Minimum X and Y resolutions
*/
#define MIN_XRES 64
#define MIN_YRES 64

Banto Linux

星期六, 5月 12, 2007

Frame Buffer

fbdemo.c

Frame Buffer Driver

s3c2410fb_3_5.c

s3c2419fb.h

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